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Permanent

Digital Signal Processing (DSP) Engineer

Gloucester
money-bag £50000 - £80000/annum
Posted Yesterday

Job Title: Digital Signal Processing (DSP) Engineer Location: Gloucester, UK Job Type: Permanent, Full-Time (37.5 hours per week - Four day working week)
Salary: £50,000 - £80,000 DOE
Clearance: Due to the nature of the work, current DV or eDV clearance is required.
 
About the Role We are looking for a DSP Engineer to join an engineering team in Gloucester. This role involves advanced research and development (R&D), software-defined radio (SDR) systems, reverse engineering, and payload development for defence, cyber, and intelligence programmes.
It''s a hands-on opportunity to work on cutting-edge technologies while building on your expertise in DSP, SDR, and algorithm development. Flexible working and professional growth are supported.
 
Key Responsibilities

  • Carry out hardware, software, and signal reverse engineering of RF systems.
  • Develop and optimise SDR solutions using advanced DSP techniques.
  • Design and implement new DSP algorithms for signal detection, classification, and exploitation.
  • Contribute to payload development for advanced communications systems.
  • Work with testing teams to validate and optimise system performance in lab and field environments.
  • Collaborate with hardware and software engineers to integrate DSP solutions into larger mission systems.
 
Skills and Experience Required
  • Strong background in DSP, including algorithm development and optimisation.
  • Experience with reverse engineering RF systems and signal analysis.
  • Practical knowledge of SDR technologies and platforms.
  • Experience in R&D for new DSP algorithms and innovative solutions.
  • Proficiency in Python, C/C++, or other DSP/SDR programming languages.
  • Understanding of modulation/demodulation techniques and digital communication protocols.
  • Experience with real-time testing and RF system performance evaluation.
 
Desirable Skills
  • Experience with GnuRadio or similar SDR platforms.
  • FPGA/RFSOC development experience, including VHDL or Verilog.
  • Familiarity with Linux environments and version control (e.g. GitLab).
  • Experience with payload development for defence or covert communications.
 
Clearance Due to the nature of the work, current DV or eDV clearance is required.

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