Design Verification Engineer
Design Verification Engineer / DV Lead Contract Fully Remote £50-60 per hour We are looking for strong Individual Contributors who can work autonomously within complex verification environments while collaborating effectively across wider engineering teams. This is a high-priority contract opportunity focused on complex next-generation verification projects involving PCIe, DDR/LPDDR, Ethernet, CXL and AMBA technologies within advanced HPC environments. The Role You will be responsible for developing and executing verification environments for high-performance controller technologies, contributing across the full verification lifecycle from planning through to debug and closure. Key responsibilities include: Developing UVM/SystemVerilog based verification environments Creating and executing new verification test cases from scratch Verification of complex HPC protocols and controllers Debugging complex verification issues independently Working with protocol VIPs and advanced verification flows Supporting coverage closure and verification sign-off activities Collaborating with wider design and verification teams Required Experience Minimum 8 years Design Verification experience Strong UVM and SystemVerilog expertise Experience verifying one or more of: PCIe CXL DDR/LPDDR High-Speed Ethernet AMBA peripherals Strong debugging and problem-solving capability Experience using protocol VIPs Ability to work independently within fast-paced engineering programmes Desirable ..... full job details .....
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